
LIBRARY IEEE
USE IEEE.STD_LOGIC_1164.ALL
USE IEEE.STD_LOGIC_UNSIGNED.ALL
ENTITY FFF IS
PORT(CLK,RESET:IN STD_LOGIC ---系统时钟和复位信号
LOAD:IN STD_LOGIC ---实现将你要预置的数输入给察拦差计数器
CURRENT:IN INTEGER RANGE 0 TO 10000--你要预置的数
COUNT:OUT INTEGER RANGE 0 TO 10000--计数器计数值
FENMIN:OUT STD_LOGIC) ---蜂鸣器值
END
ARCHITECTURE ART OF FFF IS
SIGNAL COUNT_1,COUNT_2,COUNT_D:INTEGER RANGE 0 TO 10000
SIGNAL CLK_1,CLK_2:STD_LOGIC
BEGIN
PROCESS(CLK,RESET)----编写1hz时钟
BEGIN
IF RESET='1' THEN
COUNT_1<=0
ELSIF CLK'EVENT AND CLK='1' THEN
IF COUNT_1=500 THEN
COUNT_1<=0
CLK_1<=NOT CLK_1
ELSE COUNT_1<=COUNT_1+1
END IF
END IF
END PROCESS
PROCESS(CLK,RESET)---编写50hz的时钟
BEGIN
IF RESET='1' THEN
COUNT_2<=0
ELSIF CLK'EVENT AND CLK='1'败皮 THEN
IF COUNT_2=100 THEN
COUNT_2<=0CLK_2<=NOT CLK_2
ELSE COUNT_2<=COUNT_2+1
END IF
END IF
END PROCESS
PROCESS(CLK_1,CLK_2,LOAD,CURRENT,RESET)---实现计数衡渗器自减
BEGIN
IF RESET='1' THEN
COUNT_D<=0
ELSIF LOAD='1' THEN
COUNT_D<=CURRENT
ELSIF CLK_1'EVENT AND CLK_1='1' THEN
IF COUNT_D=0 THEN
COUNT_D<=0
ELSE COUNT_D<=COUNT_D-1
END IF
END IF
COUNT<=COUNT_D
END PROCESS
PROCESS(COUNT_D) ---当计数值为0时,蜂鸣器响
BEGIN
IF COUNT_D=0 THEN
FENMIN<=CLK_2
ELSE FENMIN<='0'
END IF
END PROCESS
END ART
启动倒计时信号未来,灯全亮做一个1秒计数器
做一个计数到64的计数器
启动信号到来,1秒计数器喊者工作
1秒计数器到,1秒计数器再启动;同时,64的计数器减一
用64的计数器的值作为灯此渗余号,作一个译码器,对应一个灯,把关灯信号森滚加到这个灯上。如果1bit对应1个灯,把计数器值作为地址,改变相应bit内容。
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