
2 你输出的矩形方波 周期 T = (1/50K)s 等宽 也就是占空比50% 高电平时间是(0.5/50K)s = 0.1 ms = 100 us
3 你需要配置你的定时器(你的定时器时钟12M 计数一次就是 (1/12M)s =1/12 us, 计数值 = 100/(1/12) = 1200)产生一个100us中断, 在中断处理函数中切换你使用的io管脚高低状态。
4 用示波器测量 应该可以看到当前管脚输出一个50Khz的波形
LIBRARY IEEEUSE IEEE.STD_LOGIC_1164.ALL
USE IEEE.STD_LOGIC_ARITH.ALL
USE IEEE.STD_LOGIC_UNSIGNED.ALL
ENTITY fq_divider IS
generic(n:integer:=60000)
PORT(
CLK,reset: IN STD_LOGIC
CLK_OUT:buffer STD_LOGIC
)
END
ARCHITECTURE A OF fq_divider IS
SIGNAL CNT1,CNT2:integer:=0
SIGNAL OUTTEMP:STD_LOGIC
SIGNAL LOUT:STD_LOGIC
SIGNAL OUT3:STD_LOGIC:='0'
BEGIN
P1:PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK='1' THEN
IF CNT1=n-1 THEN
CNT1<=0
ELSE
CNT1<=CNT1+1
END IF
END IF
END PROCESS P1
P2:PROCESS(CLK)
BEGIN
IF CLK'EVENT AND CLK='0' THEN
IF CNT2=n-1 THEN
CNT2<=0
ELSE
CNT2<=CNT2+1
END IF
END IF
END PROCESS P2
P3:PROCESS(CNT1,CNT2 )
BEGIN
if ((n mod 2)=1) then
IF CNT1=1 THEN
IF CNT2=0 THEN
OUTTEMP<='1'
ELSE
OUTTEMP<='0'
END IF
ELSIF CNT1=(n+1)/2 THEN
IF CNT2=(n+1)/2 THEN
OUTTEMP<='1'
ELSE OUTTEMP<='0'
END IF
ELSE
OUTTEMP<='0'
END IF
else
if cnt1=1 then
outtemp<='1'
elsif (cnt1=(n/2+1)) then
outtemp<='1'
else
outtemp<='0'
end if
end if
END PROCESS P3
P4:PROCESS(OUTTEMP,clk,reset)
BEGIN
if reset='0' then
clk_out<=clk
elsif ((n/=2) and (n/=1)) then
IF OUTTEMP'EVENT AND OUTTEMP='1' THEN
CLK_OUT<=NOT CLK_OUT
END IF
elsif (n=2) then
if(clk'event and clk='1')then
clk_out<=not clk_out
end if
else
clk_out<=clk
end if
END PROCESS P4
END A
欢迎分享,转载请注明来源:内存溢出
微信扫一扫
支付宝扫一扫
评论列表(0条)